x86 中是否有任何指令可以加速 SHA (SHA1/2/256/512) 编码?
例如，x86 是指令集到硬件加速 AES.但是在 x86 中是否有任何指令可以加速 SHA(SHA1/2/256/512)编码，在 x86 上编码 SHA 的最快库是什么?
An example, in x86 are Instruction Set to hardware acceleration AES. But are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding, and what library is the fastet to encoding SHA on x86?
推荐答案
x86 中是否有任何指令可以加速 SHA (SHA1/2/256/512) 编码?
Are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding?
现在是 2016 年 11 月，答案终于是肯定的.但它只有 SHA-1 和 SHA-256(以及扩展的 SHA-224).
It's November 2016 and the answer is finally Yes. But its only SHA-1 and SHA-256 (and by extension, SHA-224).
带 SHA 扩展的英特尔 CPU 最近上市.看起来支持它的处理器是 Goldmont microarchitecture:
Intel CPUs with SHA extensions hit the market recently. It looks like processors which support it are Goldmont microarchitecture:
- 奔腾 J4205(台式机)
- 奔腾 N4200(移动)
- 赛扬 J3455(桌面)
- 赛扬 J3355(桌面)
- 赛扬 N3450(移动)
- 赛扬 N3350(移动)
我查看了亚马逊提供的具有架构或处理器编号的机器，但我没有找到任何可用的(还).我相信 HPAcer 有一台配备 Pentium N4200 的笔记本电脑预计将在 2016 年 11 月 2016 年 12 月上市，以满足测试需求.
I looked through offerings at Amazon for machines with the architecture or the processor numbers, but I did not find any available (yet). I believe HP Acer had one laptop with Pentium N4200 expected to be available in November 2016 December 2016 that would meet testing needs.
有关为什么它只有 SHA-1、SHA-224 和 SHA-256 的一些技术细节，请参阅 crypto: arm64/sha256 - 在内核加密邮件列表中使用 NEON 指令添加对 SHA256 的支持.简短的回答是，在 SHA-256 之上，事情不容易并行化.
For some of the technical details why it's only SHA-1, SHA-224 and SHA-256, then see crypto: arm64/sha256 - add support for SHA256 using NEON instructions on the kernel crypto mailing list. The short answer is, above SHA-256, things are not easily parallelizable.
您可以在 Noloader GitHub | 找到英特尔 SHA 内在函数和 ARMv8 SHA 内在函数的源代码.SHA 内在函数.它们是 C 源文件，并提供 SHA-1、SHA-224 和 SHA-256 的压缩功能.基于内在的实现将 SHA-1 的吞吐量提高了大约 3 倍到 4 倍，SHA-224 和 SHA-256 提高了大约 6 倍到 12 倍.
You can find source code for both Intel SHA intrinsics and ARMv8 SHA intrinsics at Noloader GitHub | SHA-Intrinsics. They are C source files, and provide the compress function for SHA-1, SHA-224 and SHA-256. The intrinsic-based implementations increase throughput approximately 3× to 4× for SHA-1, and approximately 6× to 12× for SHA-224 and SHA-256.
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